1. Field of the Invention
The present invention relates to a semiconductor memory device and more particularly to a semiconductor memory device in which memory cells are made up of a 2-terminal potential barrier and a capacity.
2. Description of the Related Art
The most densely integrated one of the semiconductor memory devices being practically used at present is a DRAM in which memory cells are made up of a MOS transistor and a capacitor.
In the conventional DRAM, a MOS transistor is used as a switching element which controls the access to a capacitor for storing data. The MOS transistor is a 4-terminal element which includes a source, a drain, a gate and a substrate. As the degree of integration become higher, using a 4-terminal element as the switching element becomes an obstacle to produce semiconductor memory devices having a higher degree of integration.